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Testing of the TriP Chip Running at 132 nsec Using a Modified AFE Board.


DE2004820409

Publication Date 2003
Personal Author Estrade, J.; Garcia, C.; Hoeneisenn, B.; Rubinov, P.
Page Count 10
Abstract In this note we describe the first set of tests done with a sample of TriP chips that were mounted on a modified AFE board. The modifications consisted of different firmware and the replacement of one power supply switch. The board used was a standard AFEIc board (red type) on which new MCMs (MCMIIs) were mounted. The new MCMs were designed to support the TriP and emulate the SVX for readout when mounted on an AFEIc board. The TriP and the MCMs are described.
Keywords
  • Analog systems
  • Coupling
  • Discriminators
  • Readout systems
  • Substrates
  • Design
  • Availability
  • Modifications
  • Testing
Source Agency
  • Technical Information Center Oak Ridge Tennessee
Corporate Authors Fermi National Accelerator Lab., Batavia, IL.; Department of Energy, Washington, DC.
Supplemental Notes Sponsored by Department of Energy, Washington, DC.
Document Type Technical Report
NTIS Issue Number 200412
Testing of the TriP Chip Running at 132 nsec Using a Modified AFE Board.
Testing of the TriP Chip Running at 132 nsec Using a Modified AFE Board.
DE2004820409

  • Analog systems
  • Coupling
  • Discriminators
  • Readout systems
  • Substrates
  • Design
  • Availability
  • Modifications
  • Testing
  • Technical Information Center Oak Ridge Tennessee
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